-
-
Notifications
You must be signed in to change notification settings - Fork 367
New issue
Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.
By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.
Already on GitHub? Sign in to your account
Capstone v6 update (without Mips) #4662
Merged
Merged
Conversation
This file contains bidirectional Unicode text that may be interpreted or compiled differently than what appears below. To review, open the file in an editor that reveals hidden Unicode characters.
Learn more about bidirectional Unicode characters
github-actions
bot
added
documentation
Improvements or additions to documentation
infrastructure
rz-test
RzAnalysis
ARM
MIPS
RZIL
X86
labels
Oct 6, 2024
Rot127
force-pushed
the
cs6-aarch64-fixups
branch
from
October 6, 2024 15:08
e2a6360
to
0d599c7
Compare
Rot127
force-pushed
the
cs6-aarch64-fixups
branch
from
October 6, 2024 15:12
0d599c7
to
c016090
Compare
XVilka
requested changes
Oct 6, 2024
wargio
reviewed
Oct 7, 2024
wargio
reviewed
Oct 7, 2024
Fix for build issue: capstone-engine/capstone#2522 |
@Rot127 please update the Capstone commit and rebase one more time |
Rot127
force-pushed
the
cs6-aarch64-fixups
branch
from
October 23, 2024 15:21
495c008
to
5fdf04c
Compare
Rot127
requested review from
kazarmy,
thestr4ng3r and
ret2libc
as code owners
October 24, 2024 11:15
This test is broken. The reason is that Rizin can't distinguish CPU models. Each M68k model has a different address mask (32-24 bits). It defaults to one which has only 24bits. Hence, the subi.l instruction decodes to 'subi.l 0x15b119, d0' instead of 'subi.l 0x8015b119, d0' Should be fixable with RzArch (if anyone is still intereses). See: rizinorg#4334
The tests broke due to capstone-engine/capstone#2212.
This reverts commit 8b55655.
With capstone-engine/capstone#2504 two false positives and a new function is discovered.
This is an attempt to fix a reported false positive warning of GCC 12 which is not reported by GCC 14.
This reverts commit 7949b02.
Rot127
force-pushed
the
cs6-aarch64-fixups
branch
from
October 24, 2024 11:22
5fdf04c
to
470ef0a
Compare
wargio
approved these changes
Oct 24, 2024
XVilka
approved these changes
Oct 24, 2024
@Rot127 please fix the build with older Capstone versions too:
|
@Rot127 see also
|
Damn, I thought the whole time I am on the v5/v4 building branch. |
Sign up for free
to join this conversation on GitHub.
Already have an account?
Sign in to comment
Labels
ARM
documentation
Improvements or additions to documentation
infrastructure
MIPS
rz-test
RzAnalysis
RZIL
X86
Add this suggestion to a batch that can be applied as a single commit.
This suggestion is invalid because no changes were made to the code.
Suggestions cannot be applied while the pull request is closed.
Suggestions cannot be applied while viewing a subset of changes.
Only one suggestion per line can be applied in a batch.
Add this suggestion to a batch that can be applied as a single commit.
Applying suggestions on deleted lines is not supported.
You must change the existing code in this line in order to create a valid suggestion.
Outdated suggestions cannot be applied.
This suggestion has been applied or marked resolved.
Suggestions cannot be applied from pending reviews.
Suggestions cannot be applied on multi-line comments.
Suggestions cannot be applied while the pull request is queued to merge.
Suggestion cannot be applied right now. Please check back later.
Your checklist for this pull request
Detailed description
Bumps Capstone version to newest Capstone
next
(beyond first v6-Alpha1).Changes:
op.size == 0
for x86 IL opsTest plan
All green
Closing issues
...