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Fix RealTimeClock & UsbBus ownership #725

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Dec 14, 2023
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9 changes: 8 additions & 1 deletion rp2040-hal/src/rtc/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -36,6 +36,7 @@ pub use self::datetime::{DateTime, DayOfWeek, Error as DateTimeError};
/// A reference to the real time clock of the system
pub struct RealTimeClock {
rtc: RTC,
clock: RtcClock,
}

impl RealTimeClock {
Expand Down Expand Up @@ -68,7 +69,7 @@ impl RealTimeClock {
let freq = clock.freq().to_Hz() - 1;
rtc.clkdiv_m1.write(|w| unsafe { w.bits(freq) });

let mut result = Self { rtc };
let mut result = Self { rtc, clock };
result.set_leap_year_check(true); // should be on by default, make sure this is the case.
result.set_datetime(initial_date)?;
Ok(result)
Expand Down Expand Up @@ -196,6 +197,12 @@ impl RealTimeClock {
self.set_match_ena(false);
self.set_match_ena(true);
}

/// Free the RTC peripheral and RTC clock
pub fn free(self, resets: &mut RESETS) -> (RTC, RtcClock) {
resets.reset.modify(|_, w| w.rtc().set_bit());
(self.rtc, self.clock)
}
}

/// Errors that can occur on methods on [RtcClock]
Expand Down
19 changes: 16 additions & 3 deletions rp2040-hal/src/usb.rs
Original file line number Diff line number Diff line change
Expand Up @@ -172,18 +172,20 @@ struct Inner {
out_endpoints: [Option<Endpoint>; 16],
next_offset: u16,
read_setup: bool,
pll: UsbClock,
#[cfg(feature = "rp2040-e5")]
errata5_state: Option<errata5::Errata5State>,
}
impl Inner {
fn new(ctrl_reg: USBCTRL_REGS, ctrl_dpram: USBCTRL_DPRAM) -> Self {
fn new(ctrl_reg: USBCTRL_REGS, ctrl_dpram: USBCTRL_DPRAM, pll: UsbClock) -> Self {
Self {
ctrl_reg,
ctrl_dpram,
in_endpoints: Default::default(),
out_endpoints: Default::default(),
next_offset: 0,
read_setup: false,
pll,
#[cfg(feature = "rp2040-e5")]
errata5_state: None,
}
Expand Down Expand Up @@ -438,7 +440,7 @@ impl UsbBus {
pub fn new(
ctrl_reg: USBCTRL_REGS,
ctrl_dpram: USBCTRL_DPRAM,
_pll: UsbClock,
pll: UsbClock,
force_vbus_detect_bit: bool,
resets: &mut RESETS,
) -> Self {
Expand Down Expand Up @@ -476,7 +478,7 @@ impl UsbBus {
});

Self {
inner: Mutex::new(RefCell::new(Inner::new(ctrl_reg, ctrl_dpram))),
inner: Mutex::new(RefCell::new(Inner::new(ctrl_reg, ctrl_dpram, pll))),
}
}

Expand All @@ -487,6 +489,17 @@ impl UsbBus {
inner.ctrl_reg.sie_ctrl.modify(|_, w| w.resume().set_bit());
});
}

/// Stop and free the Usb resources
pub fn free(self, resets: &mut RESETS) -> (USBCTRL_REGS, USBCTRL_DPRAM, UsbClock) {
critical_section::with(|_cs| {
let inner = self.inner.into_inner().into_inner();

inner.ctrl_reg.reset_bring_down(resets);

(inner.ctrl_reg, inner.ctrl_dpram, inner.pll)
})
}
}

impl UsbBusTrait for UsbBus {
Expand Down
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