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Refer to #50072 re. hack.
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Centril committed Jul 24, 2019
1 parent 2e193f7 commit 7fdfe8b
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Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
#[repr(u8)]
enum Alpha {
V1 = 41,
V2 = Self::V1 as u8 + 1, // OK -- but why?
V2 = Self::V1 as u8 + 1, // OK; See #50072.
V3 = Self::V1 {} as u8 + 2, //~ ERROR cycle detected when const-evaluating
}

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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ note: cycle used when collecting item types in top-level module
LL | / #[repr(u8)]
LL | | enum Alpha {
LL | | V1 = 41,
LL | | V2 = Self::V1 as u8 + 1, // OK -- but why?
LL | | V2 = Self::V1 as u8 + 1, // OK; See #50072.
... |
LL | |
LL | | fn main() {}
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