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Incremental compilation regression from 1.79 to 1.80: rustc-LLVM ERROR: Intervals are contiguous/overlapping #128555
Comments
It's a proprietary code base, but I'll try my best to minimize the dependencies and code and see if I can get to something shareable. If you've got any other ideas on what to test or try, please let me know! |
That LLVM metadata in the error looks like the kind that would be used with rust/compiler/rustc_codegen_llvm/src/builder.rs Lines 669 to 696 in fd8d6fb
@rust-lang/wg-llvm might have some guesses here? Not sure why it would be incremental-related, though. |
It's weird. My guess is that it's due to some LLVM Passes. |
My first guess here would be a bug in getMostGenericRange(), but at least the basic case seems to work correctly: https://llvm.godbolt.org/z/sYY11P6Tc |
Making progress on figuring out the minimal code to comment out to successfully compile again, on the way I've now got this:
|
Fully-minimized repro: https://github.com/seritools/ripferris Do note the Cargo.toml release profile settings. Run with // if this function is not commented out, ferris dies :c
pub fn kill_ferris(a: &Outer, b: &Outer) -> bool {
a == b
}
#[derive(PartialEq)]
pub enum Inner1 {
A,
B = 0x7F,
}
#[derive(PartialEq)]
pub enum Inner2 {
C = 0x80,
D,
}
#[derive(PartialEq)]
pub enum Inner3 {
E,
F,
}
#[derive(PartialEq)]
pub enum Outer {
Inner3(Inner3),
Inner2(Inner2),
Inner1(Inner1),
} with [profile.release]
incremental = true
Notes:
|
Thanks! |
Reduced repro even further, with the minimal B and C values (thx @shepmaster). Reduce them any further and the error is gone. Also removed the slice and replaced with just an equals check (since the bisect pointed to a |
Very interesting, I can trigger random crashes locally at stage 1, for example:
|
Never really looked at LLVM IR before, but guessing by what @nikic posted with the According to LLVM docs:
The generated IR between 1.79.0 and 1.80.0 has changed significantly for Rust 1.80.0, ; ModuleID = 'duqhpgcgzz5uc8dyf0qjrz9af'
source_filename = "duqhpgcgzz5uc8dyf0qjrz9af"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
; ripferris::kill_ferris
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read, inaccessiblemem: readwrite) uwtable
define noundef zeroext i1 @_ZN9ripferris11kill_ferris17h99c74ef3cc576d2cE(ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %0, ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %1) unnamed_addr #0 {
start:
tail call void @llvm.experimental.noalias.scope.decl(metadata !2)
tail call void @llvm.experimental.noalias.scope.decl(metadata !5)
%2 = load i8, ptr %0, align 1, !range !7, !alias.scope !2, !noalias !5, !noundef !8
%3 = load i8, ptr %1, align 1, !range !7, !alias.scope !5, !noalias !2, !noundef !8
%_5.i.i = icmp eq i8 %2, %3
%4 = getelementptr inbounds i8, ptr %0, i64 1
%5 = getelementptr inbounds i8, ptr %1, i64 1
%_3.val.i.i.i = load i8, ptr %4, align 1, !range !9, !alias.scope !2, !noalias !5
%_4.val.i.i.i = load i8, ptr %5, align 1, !range !9, !alias.scope !5, !noalias !2
%_0.i.i.i.i = icmp eq i8 %_3.val.i.i.i, %_4.val.i.i.i
%_0.sroa.0.0.shrunk.i.i = select i1 %_5.i.i, i1 %_0.i.i.i.i, i1 false
ret i1 %_0.sroa.0.0.shrunk.i.i
}
; Function Attrs: nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite)
declare void @llvm.experimental.noalias.scope.decl(metadata) #1
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read, inaccessiblemem: readwrite) uwtable "target-cpu"="x86-64" "target-features"="+cx16,+sse3,+sahf" }
attributes #1 = { nocallback nofree nosync nounwind willreturn memory(inaccessiblemem: readwrite) }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{!"rustc version 1.80.0 (051478957 2024-07-21)"}
!2 = !{!3}
!3 = distinct !{!3, !4, !"_ZN57_$LT$ripferris..Outer$u20$as$u20$core..cmp..PartialEq$GT$2eq17h77e2ba2e053f3aceE: %self"}
!4 = distinct !{!4, !"_ZN57_$LT$ripferris..Outer$u20$as$u20$core..cmp..PartialEq$GT$2eq17h77e2ba2e053f3aceE"}
!5 = !{!6}
!6 = distinct !{!6, !4, !"_ZN57_$LT$ripferris..Outer$u20$as$u20$core..cmp..PartialEq$GT$2eq17h77e2ba2e053f3aceE: %other"}
!7 = !{i8 0, i8 3}
!8 = !{}
!9 = !{i8 -128, i8 -126, i8 0, i8 -128} Rust 1.80.0, ; ModuleID = 'ripferris.66419103721d0e4a-cgu.0'
source_filename = "ripferris.66419103721d0e4a-cgu.0"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
; ripferris::kill_ferris
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define noundef zeroext i1 @_ZN9ripferris11kill_ferris17hfe68d666d6297f4cE(ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %a, ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %b) unnamed_addr #0 {
start:
%a.val = load i8, ptr %a, align 1, !range !2, !noundef !3
%0 = getelementptr inbounds i8, ptr %a, i64 1
%a.val1 = load i8, ptr %0, align 1
%b.val = load i8, ptr %b, align 1, !range !2, !noundef !3
%1 = getelementptr inbounds i8, ptr %b, i64 1
%b.val2 = load i8, ptr %1, align 1
%_5.i = icmp eq i8 %a.val, %b.val
%2 = icmp eq i8 %a.val1, %b.val2
%spec.select.i = select i1 %_5.i, i1 %2, i1 false
ret i1 %spec.select.i
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "target-cpu"="x86-64" "target-features"="+cx16,+sse3,+sahf" }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{!"rustc version 1.80.0 (051478957 2024-07-21)"}
!2 = !{i8 0, i8 3}
!3 = !{} Rust 1.79.0, ; ModuleID = '572zzncnlkt8fmud'
source_filename = "572zzncnlkt8fmud"
target datalayout = "e-m:w-p270:32:32-p271:32:32-p272:64:64-i64:64-i128:128-f80:128-n8:16:32:64-S128"
target triple = "x86_64-pc-windows-msvc"
; ripferris::kill_ferris
; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable
define noundef zeroext i1 @_ZN9ripferris11kill_ferris17hfea6ce1318ba41a7E(ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %0, ptr noalias nocapture noundef readonly align 1 dereferenceable(2) %1) unnamed_addr #0 {
start:
%_3.val.i = load i8, ptr %0, align 1, !range !2, !noundef !3
%2 = getelementptr inbounds i8, ptr %0, i64 1
%_3.val1.i = load i8, ptr %2, align 1
%_4.val.i = load i8, ptr %1, align 1, !range !2, !noundef !3
%3 = getelementptr inbounds i8, ptr %1, i64 1
%_4.val2.i = load i8, ptr %3, align 1
%_5.i.i = icmp eq i8 %_3.val.i, %_4.val.i
%_0.i.i.i = icmp eq i8 %_3.val1.i, %_4.val2.i
%spec.select.i.i = select i1 %_5.i.i, i1 %_0.i.i.i, i1 false
ret i1 %spec.select.i.i
}
attributes #0 = { mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: read) uwtable "target-cpu"="x86-64" "target-features"="+cx16,+sse3,+sahf" }
!llvm.module.flags = !{!0}
!llvm.ident = !{!1}
!0 = !{i32 8, !"PIC Level", i32 2}
!1 = !{!"rustc version 1.79.0 (129f3b996 2024-06-10)"}
!2 = !{i8 0, i8 3}
!3 = !{} |
Ah, the minimal reproducible example is: https://llvm.godbolt.org/z/3vbrnjvPq define i8 @foo(ptr %arg, i8 %arg1) {
bb:
%i = load i8, ptr %arg, align 1, !range !{i8 127, i8 -20}
%i2 = load i8, ptr %arg, align 1, !range !{i8 -27, i8 -24, i8 -20, i8 -17}
%i3 = add i8 %i, %i2
ret i8 %i3
} (But I'm going to bed. 😴 |
Upstreamed issue: llvm/llvm-project#101859. @rustbot claim |
This can happen in any version: https://rust.godbolt.org/z/1zTxnWTj4. |
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang#128555.
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang#128555.
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang#128555.
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang/rust#128555.
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang/rust#128555.
Update to LLVM 19 rc2 Update from ~rc1 to rc2. Fixes rust-lang#128555.
Code
Repro repository and steps: #128555 (comment)
I've bisected between 1.79.0 and 1.80.0:
searched nightlies: from nightly-2024-04-28 to nightly-2024-06-07
regressed nightly: nightly-2024-05-10
searched commit range: 87293c9...8f9080d
regressed commit: cb93c24
bisected with cargo-bisect-rustc v0.6.9
Host triple: x86_64-pc-windows-msvc
Reproduce with:
Old context
Context
It's a company project with a workspace that compiles ~680 crates on a clean compile.
From initial testing it seems like an incremental compilation bug :S
cargo build
works,cargo build --release
fails, but when settingincremental = false
in[profile.relese]
,cargo build --release
succeeds again.cargo build --release -p <crate-name>
also reproduces the issue, dropping the number of crates down to "only" 203.This is our profile config:
Meta
This reproduces on 1.80 and the current nightly (as of writing this ticket). This does not reproduce on 1.79.0.
rustc --version --verbose
:and
Error output
There is no backtrace being printed, even with
RUST_BACKTRACE=1
.The text was updated successfully, but these errors were encountered: