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Enable f16 in assembly on aarch64 platforms that support it #127043
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Signed-off-by: rongfu.leng <[email protected]>
r? @tgross35 |
Failed to set assignee to
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r? @Amanieu since you reviewed the other |
The job Click to see the possible cause of the failure (guessed by this bot)
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// neon-LABEL: vreg_f16x4: | ||
// neon: @APP | ||
// neon: vmov.f64 d{{[0-9]+}}, d{{[0-9]+}} | ||
// neon: @NO_APP | ||
#[cfg(neon)] | ||
check!(vreg_f16x4 f16x4 vreg "vmov.f64"); | ||
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// neon-LABEL: vreg_f16x8: | ||
// neon: @APP | ||
// neon: vorr q{{[0-9]+}}, q{{[0-9]+}}, q{{[0-9]+}} | ||
// neon: @NO_APP | ||
#[cfg(neon)] | ||
check!(vreg_f16x8 f16x8 vreg "vmov"); |
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I don't think these neon
labels are actually getting tested, you need to add neon
in the //@ revisions:
list at the top and make sure --cfg neon
gets passed for at least one of the tests (like
rust/tests/assembly/asm/arm-types.rs
Lines 1 to 7 in 2495953
//@ revisions: base d32 neon | |
//@ assembly-output: emit-asm | |
//@ compile-flags: --target armv7-unknown-linux-gnueabihf | |
//@ compile-flags: -C opt-level=0 | |
//@[d32] compile-flags: -C target-feature=+d32 | |
//@[neon] compile-flags: -C target-feature=+neon --cfg d32 | |
//@[neon] filecheck-flags: --check-prefix d32 |
I'm not sure what combinations it makes sense to test, there's also a fp16
target feature. Cc @workingjubilee since you did some work on neon and flags
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The neon
target feature is enabled by default on aarch64-unknown-linux-gnu
and arm64ec-pc-windows-msvc
, so there's no need to have any cfg unless it's been explicitly disabled.
However, once the cfg
is removed there might be compilation failures on arm64ec-pc-windows-msvc
due to llvm/llvm-project#94434, in which case the options are to either change the check!
macro to not pass/return f16
by value or just cfg(aarch64)
the f16
test cases and leave a FIXME(f16_f128)
comment.
@rustbot label +F-f16_and_f128 |
@rustbot author |
@lengrongfu are you still interested in working on this? No problem if not, somebody else may be able to pick up your work and get it over the line. |
Sorry, I don't have enough time to fix this. |
…, r=<try> Add `f16` and `f128` inline ASM support for `aarch64` Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043. Relevant issue: rust-lang#125398 Tracking issue: rust-lang#116909 `@rustbot` label +F-f16_and_f128 try-job: aarch64-gnu try-job: aarch64-apple
…, r=<try> Add `f16` and `f128` inline ASM support for `aarch64` Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043. Relevant issue: rust-lang#125398 Tracking issue: rust-lang#116909 `@rustbot` label +F-f16_and_f128 try-job: aarch64-gnu try-job: aarch64-apple
…64, r=Amanieu Add `f16` and `f128` inline ASM support for `aarch64` Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043. Relevant issue: rust-lang#125398 Tracking issue: rust-lang#116909 `@rustbot` label +F-f16_and_f128 try-job: aarch64-gnu try-job: aarch64-apple
Rollup merge of rust-lang#129536 - beetrees:f16-f128-inline-asm-aarch64, r=Amanieu Add `f16` and `f128` inline ASM support for `aarch64` Adds `f16` and `f128` inline ASM support for `aarch64`. SIMD vector types are taken from [the ARM intrinsics list](https://developer.arm.com/architectures/instruction-sets/intrinsics/#f:`@navigationhierarchiesreturnbasetype=[float]&f:@navigationhierarchieselementbitsize=[16]&f:@navigationhierarchiesarchitectures=[A64]).` Based on the work of `@lengrongfu` in rust-lang#127043. Relevant issue: rust-lang#125398 Tracking issue: rust-lang#116909 `@rustbot` label +F-f16_and_f128 try-job: aarch64-gnu try-job: aarch64-apple
Issue: #125398
About pr: #126070