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Update I2C pin mappings based on STM32L0xx GPIO IP #87

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merged 3 commits into from
Apr 5, 2020

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dbrgn
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@dbrgn dbrgn commented Mar 28, 2020

The GPIO internal peripheral (IP) does not match the stm32l0x/stm32l0x2/stm32l0x3 grouping used in the PACs. Instead, there are 4 different GPIO IPs in the STM32L0 family that define how the pin functions are mapped to the actual pins. This means that the current I2C mappings are broken for a lot of MCUs. For reference, these issues have already been opened because the mappings were broken:

We can use the io-* Cargo features to differentiate between these mappings. This requires that the proper io-* feature is set when compiling (and is thus a breaking change). The easiest way to apply the feature without looking at the STM32CubeMX database XML files is to simply use the proper mcu-* feature, for example mcu-STM32L071KBTx.

The pin mappings used in this changeset were taken out of the cube-parse output for the STM32L0 family. The output can be found here. To re-generate:

cargo run -- pin_mappings STM32L0 -d /path/to/stm32cubemx/db/mcu/

The source files in the STM32CubeMx database used to generate the mappings:

  • /path/to/stm32cubemx/db/mcu/IP/GPIO-STM32L021_gpio_v1_0_Modes.xml
  • /path/to/stm32cubemx/db/mcu/IP/GPIO-STM32L031_gpio_v1_0_Modes.xml
  • /path/to/stm32cubemx/db/mcu/IP/GPIO-STM32L051_gpio_v1_0_Modes.xml
  • /path/to/stm32cubemx/db/mcu/IP/GPIO-STM32L071_gpio_v1_0_Modes.xml

More information on the database format can be found in the cube-parse README.

The long-term solution should probably be a universal pin mapping file generated by cube-parse, but with the current APIs this would be a major refactoring. Therefore a manual fix must suffice for now.

Fixes #76, fixes #77, fixes #85.

CC @rnestler @DanSGiesbrecht @ijager

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dbrgn commented Mar 29, 2020

I have verified this PR against an STM32L071KBTx MCU and at least I2C1 seems to work properly.

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@dbrgn Looks like #68 has a few merge conflicts with this PR

dbrgn added 3 commits April 5, 2020 01:13
The GPIO internal peripheral (IP) does not match the
stm32l0x/stm32l0x2/stm32l0x3 grouping. Instead, there are 4 different
GPIO IPs in the STM32L0 family that define how the pin functions are
mapped to the actual pins. This means that the current I2C mappings are
broken for a lot of MCUs. For reference, these issues have already been
opened because the mappings were broken:

- stm32-rs#76
- stm32-rs#77
- stm32-rs#85

We can use the `io-*` Cargo features to differentiate between these
mappings. This requires that the proper `io-*` feature is set when
compiling (and is thus a breaking change). The easiest way to apply the
feature without looking at the STM32CubeMX database XML files is to
simply use the proper `mcu-*` feature, for example `mcu-STM32L071KBTx`.
@dbrgn dbrgn force-pushed the i2c-correct-mappings branch from 4a8e60f to a2dd816 Compare April 4, 2020 23:17
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dbrgn commented Apr 4, 2020

@dbrgn Looks like #68 has a few merge conflicts with this PR

Yup, I just rebased the branch. Let's hope I resolved the conflicts correctly & the tests pass again 🙂

feature = "io-STM32L031",
feature = "io-STM32L051",
feature = "io-STM32L071",
))]
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Multiple cfg attributes are additive (so both need to match), right?

I'm not sure whether stm32l0x2 is still required, but on the other hand I don't have much experience with DMA yet.

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Looks good! Thanks!

@arkorobotics arkorobotics merged commit c18eb55 into stm32-rs:master Apr 5, 2020
@dbrgn dbrgn deleted the i2c-correct-mappings branch April 5, 2020 11:17
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I2C 'Wait until byte is transferred' loop I2C Example - Error Reading Variable
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