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driver/clock_control: Clean up stm32h7 and stm32u5 drivers #41585
driver/clock_control: Clean up stm32h7 and stm32u5 drivers #41585
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Few inline comments, otherwise, LGTM
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@ABOSTM Thanks for the review. Comments fixed. |
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LGTM
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The stm32_clock_control_init function return code seems not tested yet, however if it could be <>0 , then we could see in the function something like
if (IS_ENABLED(STM32_PLL_SRC_HSE)) {
...
if (IS_ENABLED(STM32_PLL3_P_ENABLE)) {
...
else
return -ENOTSUP
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Remove conditions around some definitions since these symbols and the node itself are mandatory. Signed-off-by: Erwan Gouriou <[email protected]>
Group definitions by related node. Signed-off-by: Erwan Gouriou <[email protected]>
Tweak some macros definitions so that they can be used in IS_ENABLED utility macro. Finality is to rework STM32 clock_control driver to a more readable format. Signed-off-by: Erwan Gouriou <[email protected]>
Use benefits of IS_ENABLED. Signed-off-by: Erwan Gouriou <[email protected]>
Re-arrange code using benefits of IS_ENABLED. Change some #if to #ifdef when possible. Signed-off-by: Erwan Gouriou <[email protected]>
- Factorize elementary clocks setup code. - Put conditional logic on CONFIG_CPU_CORTEX_M4 outside init function Signed-off-by: Erwan Gouriou <[email protected]>
PLL3 setting should also be protected CFG_HW_RCC_SEMID. Move semaphore unlock after we're done with PLL3. Signed-off-by: Erwan Gouriou <[email protected]>
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change commit msg to drivers/clock_control: stm32u5: Use LL API for LSESYS programming
Use LL API when possible. Signed-off-by: Erwan Gouriou <[email protected]>
Add STM32_FOO_ENABLED and STM32_FOO_FREQ to STM32 fixed clocks: HSI, HSE, MSI(S), CSI, LSI, LSE.. Replace STM32_LSE_CLOCK by STM32_LSE_FREQ and when possible replace by new STM32_LSE_ENABLED when making sense. Fix STM32_PLL3_FOO_ENABLE to STM32_PLL3_FOO_ENABLED Additionally, add STM32_PLL_FOO_ENABLED definitions. Signed-off-by: Erwan Gouriou <[email protected]>
Rework clock start up functions in order to allow configuration and enabling of individual clocks. This way, each clock defined with a "okay" status will be enabled even if not part of the sysclock clock tree. Signed-off-by: Erwan Gouriou <[email protected]>
Instead of reading registers query the info on sysclock configuration from existing configuration symbols. Signed-off-by: Erwan Gouriou <[email protected]>
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Fixed, Thanks |
Attempt to clean up STM32 clock_control driver, starting on H7 and U5 series.
Main target is to clean up
clock_stm32_ll_common.c
which is used by all the other STM32 series,but I first want to validate ideas on these 2 first ones.
In the end, there are not much changes, aside from:
Changes were tested thanks to new dedicated tests available in
tests/drivers/clock_control/stm32_clock_configuration
.Based on:
drivers/clock_control: stm32u5: Use LL utility to set MSI as PLL srce #41310(merged)stm32: clock_control: Add test suite for stm32h7 #41391(merged)EDIT (01/18):
Following changes were made on top of existing proposal. Reason not to split this in another PR is that I prefer to group breaking changes in one big PR and then be done with it. I think this is also preferable for driver users.
The rationale behind this new changes is to prepare introduction of alternate / optional clock sources (cf #41650), which requires to be able to enable each source clock independently from each others.