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drivers: dma: Add initial support for NXP SDMA #80330
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dbaluta
requested review from
mmahadevan108,
dleach02 and
iuliana-prodan
as code owners
October 23, 2024 16:49
zephyrbot
added
area: Xtensa
Xtensa Architecture
platform: NXP Drivers
NXP Semiconductors, drivers
area: DMA
Direct Memory Access
labels
Oct 23, 2024
zephyrbot
requested review from
andyross,
ceolin,
danieldegrasse,
dcpleung,
decsny,
manuargue,
MarkWangChinese,
nashif and
teburd
October 23, 2024 16:50
Changes since v1:
|
This adds initial support for NXP SDMA controller. We make use of NXP HAL to configure the IP. SDMA uses BD (buffer descriptors) to describe a transfer. We create a cyclic list of descriptors and trigger them manually at start and later when data is available. This is tested using Sound Open Firmware app on top of Zephyr. Signed-off-by: Daniel Baluta <[email protected]>
Add sai3 and sdma3 nodes found on NXP i.MX8MP SOC. Signed-off-by: Daniel Baluta <[email protected]>
pdgendt
reviewed
Nov 29, 2024
return true; | ||
} | ||
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static const struct dma_driver_api sdma_api = { |
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All device drivers need to use the DEVICE_API
macro.
Suggested change
static const struct dma_driver_api sdma_api = { | |
static DEVICE_API(dma, sdma_api) = { |
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thanks will fix.
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Labels
area: DMA
Direct Memory Access
area: Xtensa
Xtensa Architecture
platform: NXP Drivers
NXP Semiconductors, drivers
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This adds initial support for NXP SDMA controller. We make use
of NXP HAL to configure the IP. SDMA uses BD (buffer descriptors) to describe a transfer. We create
a cyclic list of descriptors and trigger them manually at start and later when data is available.
This is tested using Sound Open Firmware app on top of Zephyr.
We first need to merge following PRs: