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- Add generate block labels (~/pull/4)
- Fix yosys/Icestudio synthesis error
- Add tests related to asynchronous/synchronous set and clear
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@TimRudy
TimRudy committed Jan 20, 2020
1 parent 7cb19a4 commit 1a34abc
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Showing 7 changed files with 322 additions and 121 deletions.
4 changes: 2 additions & 2 deletions includes/helper.v
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Original file line number Diff line number Diff line change
@@ -1,3 +1,3 @@
`define ASSIGN_UNPACK_ARRAY(PK_LEN, PK_WIDTH, UNPK_DEST, PK_SRC) wire [PK_LEN*PK_WIDTH-1:0] PK_IN_BUS; assign PK_IN_BUS=PK_SRC; genvar unpk_idx; generate for (unpk_idx=0; unpk_idx<PK_LEN; unpk_idx=unpk_idx+1) begin assign UNPK_DEST[unpk_idx][PK_WIDTH-1:0]=PK_IN_BUS[PK_WIDTH*unpk_idx+:PK_WIDTH]; end endgenerate
`define ASSIGN_UNPACK_ARRAY(PK_LEN, PK_WIDTH, UNPK_DEST, PK_SRC) wire [PK_LEN*PK_WIDTH-1:0] PK_IN_BUS; assign PK_IN_BUS=PK_SRC; generate genvar unpk_idx; for (unpk_idx=0; unpk_idx<PK_LEN; unpk_idx=unpk_idx+1) begin: gen_unpack assign UNPK_DEST[unpk_idx][PK_WIDTH-1:0]=PK_IN_BUS[PK_WIDTH*unpk_idx+:PK_WIDTH]; end endgenerate

`define PACK_ARRAY(PK_LEN, PK_WIDTH, UNPK_SRC) PK_OUT_BUS; wire [PK_LEN*PK_WIDTH-1:0] PK_OUT_BUS; genvar pk_idx; generate for (pk_idx=0; pk_idx<PK_LEN; pk_idx=pk_idx+1) begin assign PK_OUT_BUS[PK_WIDTH*pk_idx+:PK_WIDTH]=UNPK_SRC[pk_idx][PK_WIDTH-1:0]; end endgenerate
`define PACK_ARRAY(PK_LEN, PK_WIDTH, UNPK_SRC) PK_OUT_BUS; wire [PK_LEN*PK_WIDTH-1:0] PK_OUT_BUS; generate genvar pk_idx; for (pk_idx=0; pk_idx<PK_LEN; pk_idx=pk_idx+1) begin: gen_pack assign PK_OUT_BUS[PK_WIDTH*pk_idx+:PK_WIDTH]=UNPK_SRC[pk_idx][PK_WIDTH-1:0]; end endgenerate
193 changes: 150 additions & 43 deletions source-7400/74112-tb.v
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Original file line number Diff line number Diff line change
Expand Up @@ -259,8 +259,8 @@ begin
J = 3'b011;
K = 3'b101;
#15
// load second and third blocks, toggle first block, apply clock edge in first and
// second blocks -> output 111
// load second and third blocks, toggle first block, apply clock edge in
// first and second blocks -> output 111
Clk = 3'b100;
#7
tbassert(Q == 3'b111, "Test 21");
Expand All @@ -272,8 +272,8 @@ begin
tbassert(Q == 3'b111, "Test 22");
tbassert(Q_bar == 3'b000, "Test 22");
#0
// load second and third blocks, toggle first block, apply clock edge in first and
// second blocks -> output 110
// load second and third blocks, toggle first block, apply clock edge in
// first and second blocks -> output 110
// J = 3'b011;
// K = 3'b101;
#15
Expand Down Expand Up @@ -354,13 +354,13 @@ begin

// the following set of tests are for: clear

// clear from 101, not enough time for output to fall/rise
// asynchronous clear from 101, not enough time for output to fall/rise
Clear_bar = 3'b000;
#2
tbassert(Q == 3'b101, "Test 31");
tbassert(Q_bar == 3'b010, "Test 31");
#5
// clear from 101 -> output 0s
// asynchronous clear from 101 -> output 0s
tbassert(Q == 3'b000, "Test 31");
tbassert(Q_bar == 3'b111, "Test 31");
#150
Expand All @@ -385,18 +385,20 @@ begin
J = 3'b111;
K = 3'b111;
#15
// clear from 011 in contention with toggle (at clock edge in second and third blocks)
// asynchronous clear from 011 in contention with toggle (at clock edge in
// second and third blocks)
Clear_bar = 3'b000;
Clk = 3'b001;
#2
tbassert(Q == 3'b011, "Test 33");
tbassert(Q_bar == 3'b100, "Test 33");
#5
// clear from 011 in contention with toggle -> output 0s
// asynchronous clear from 011 in contention with toggle -> output 0s
tbassert(Q == 3'b000, "Test 33");
tbassert(Q_bar == 3'b111, "Test 33");
#10
// clear from 011, apply clock edge in first block separately with null effect on output
// asynchronous clear from 011, apply clock edge in first block separately with null effect on
// output
Clk[0] = 1'b0;
#7
tbassert(Q == 3'b000, "Test 33");
Expand Down Expand Up @@ -466,19 +468,20 @@ begin
J = 3'b110;
K = 3'b101;
#40
// clear from 011 in contention with load and toggle (at clock edge in
// asynchronous clear from 011 in contention with load and toggle (at clock edge in
// second and third blocks)
Clear_bar = 3'b000;
Clk = 3'b001;
#2
tbassert(Q == 3'b011, "Test 36");
tbassert(Q_bar == 3'b100, "Test 36");
#5
// clear from 011 in contention with load and toggle -> output 0s
// asynchronous clear from 011 in contention with load and toggle -> output 0s
tbassert(Q == 3'b000, "Test 36");
tbassert(Q_bar == 3'b111, "Test 36");
#10
// clear from 011, apply clock edge in first block separately with null effect on output
// asynchronous clear from 011, apply clock edge in first block separately with null effect on
// output
Clk[0] = 1'b0;
#7
tbassert(Q == 3'b000, "Test 37");
Expand Down Expand Up @@ -523,7 +526,7 @@ begin
tbassert(Q == 3'b111, "Test 39");
tbassert(Q_bar == 3'b000, "Test 39");
#150
// hold state -> remains preset after preset signal ends
// hold state -> remains set after preset signal ends
Preset_bar = 3'b111;
#120
tbassert(Q == 3'b111, "Test 40");
Expand All @@ -544,7 +547,8 @@ begin
J = 3'b111;
K = 3'b111;
#15
// preset from 011 in contention with toggle (at clock edge in second and third blocks)
// preset from 011 in contention with toggle (at clock edge in
// second and third blocks)
Preset_bar = 3'b000;
Clk = 3'b001;
#2
Expand All @@ -555,13 +559,13 @@ begin
tbassert(Q == 3'b111, "Test 41");
tbassert(Q_bar == 3'b000, "Test 41");
#10
// preset from 011, apply clock edge in first block separately with null effect on output
// preset, apply clock edge in first block separately with null effect on output
Clk[0] = 1'b0;
#7
tbassert(Q == 3'b111, "Test 41");
tbassert(Q_bar == 3'b000, "Test 41");
#150
// hold state, second block -> remains preset after preset signal ends
// hold state, second block -> remains set after preset signal ends
Preset_bar[1] = 1'b1;
#20
tbassert(Q == 3'b111, "Test 42");
Expand Down Expand Up @@ -599,7 +603,7 @@ begin
tbassert(Q_bar == 3'b110, "Test 43");
#0
// set up different data input values
J = 3'b110;
J = 3'b010;
K = 3'b011;
#15
// preset third block separately -> output 101
Expand All @@ -623,7 +627,7 @@ begin
#0
// set up different data input values, load and toggle
J = 3'b110;
K = 3'b101;
K = 3'b011;
#40
// preset from 010 in contention with load and toggle (at clock edge in
// second and third blocks)
Expand All @@ -643,7 +647,7 @@ begin
tbassert(Q == 3'b111, "Test 45");
tbassert(Q_bar == 3'b000, "Test 45");
#70
// hold state, second block -> remains preset after preset signal ends
// hold state, second block -> remains set after preset signal ends
Preset_bar[1] = 1'b1;
#20
tbassert(Q == 3'b111, "Test 46");
Expand All @@ -667,8 +671,111 @@ begin
tbassert(Q == 3'b111, "Test 46");
tbassert(Q_bar == 3'b000, "Test 46");
#0
Clk[1] = 1'b1;
#50
Clk = 3'b111;
#15

// the following set of tests are for: preset and clear in combination

// after preset in contention with asynchronous clear, extra preset does not spuriously occur
Preset_bar = 3'b000;
#25
// clear first and third blocks with clock high -> output 010
Clear_bar = 3'b010;
#7
tbassert(Q == 3'b010, "Test 47");
tbassert(Q_bar == 3'b101, "Test 47");
#15
Clear_bar = 3'b111;
#25
// preset signal ends with null effect on output
Preset_bar = 3'b111;
#15
tbassert(Q == 3'b010, "Test 47");
tbassert(Q_bar == 3'b101, "Test 47");
#0
J = 3'b010;
K = 3'b101;
#15
// apply clock pulses with null effect on output
Clk = 3'b001;
#15
Clk = 3'b111;
#15
Clk = 3'b010;
#15
Clk = 3'b111;
#15
Clk = 3'b000;
#15
tbassert(Q == 3'b010, "Test 47");
tbassert(Q_bar == 3'b101, "Test 47");
#0
// clear with clock low -> output 0s
Clear_bar = 3'b000;
#10
tbassert(Q == 3'b000, "Test 48");
tbassert(Q_bar == 3'b111, "Test 48");
#20
Clear_bar = 3'b111;
#10
Clk = 3'b111;
#20
// clear with clock transition to low -> output 0s
Clear_bar = 3'b000;
#10
Clk = 3'b000;
#20
Clear_bar = 3'b111;
#15
Clk = 3'b111;
#7
tbassert(Q == 3'b000, "Test 49");
tbassert(Q_bar == 3'b111, "Test 49");
#0
// set up different data input values
J = 3'b011;
K = 3'b101;
#15
// after preset then asynchronous clear, extra preset does not spuriously occur
Preset_bar = 3'b000;
#25
Preset_bar = 3'b111;
#7
Clk = 3'b000;
#7
// clear first and third blocks with clock low -> output 010
Clear_bar = 3'b010;
#7
tbassert(Q == 3'b010, "Test 50");
tbassert(Q_bar == 3'b101, "Test 50");
#15
Clear_bar = 3'b111;
#25
Clk = 3'b111;
#15
// apply clock edge -> output 011
Clk = 3'b000;
#7
tbassert(Q == 3'b011, "Test 51");
tbassert(Q_bar == 3'b100, "Test 51");
#15
Clk = 3'b111;
#0
J = 3'b011;
K = 3'b100;
#15
// apply clock pulses with null effect on output
Clk = 3'b001;
#15
Clk = 3'b111;
#15
Clk = 3'b000;
#15
Clk = 3'b111;
#15
tbassert(Q == 3'b011, "Test 51");
tbassert(Q_bar == 3'b100, "Test 51");
#0

// the following set of tests are for: hold state and applying clock edge in
// each block separately
Expand All @@ -681,8 +788,8 @@ begin
#15
Clk = 3'b111;
#15
tbassert(Q == 3'b101, "Test 47");
tbassert(Q_bar == 3'b010, "Test 47");
tbassert(Q == 3'b101, "Test 52");
tbassert(Q_bar == 3'b010, "Test 52");
#0
// hold state (clocked) with null effect on output 101
J = 3'b000;
Expand All @@ -692,8 +799,8 @@ begin
#25
Clk = 3'b111;
#15
tbassert(Q == 3'b101, "Test 47");
tbassert(Q_bar == 3'b010, "Test 47");
tbassert(Q == 3'b101, "Test 52");
tbassert(Q_bar == 3'b010, "Test 52");
#0
// load same value appearing at the output with null effect on output 101
J = 3'b101;
Expand All @@ -702,14 +809,14 @@ begin
// apply clock edge in third block separately
Clk = 3'b011;
#20
tbassert(Q == 3'b101, "Test 48");
tbassert(Q_bar == 3'b010, "Test 48");
tbassert(Q == 3'b101, "Test 53");
tbassert(Q_bar == 3'b010, "Test 53");
#0
// apply clock edge in first and second blocks separately
Clk = 3'b000;
#20
tbassert(Q == 3'b101, "Test 48");
tbassert(Q_bar == 3'b010, "Test 48");
tbassert(Q == 3'b101, "Test 53");
tbassert(Q_bar == 3'b010, "Test 53");
#0
Clk = 3'b111;
#15
Expand All @@ -719,17 +826,17 @@ begin
J = 3'b011;
K = 3'b101;
#75
tbassert(Q == 3'b101, "Test 49");
tbassert(Q_bar == 3'b010, "Test 49");
tbassert(Q == 3'b101, "Test 54");
tbassert(Q_bar == 3'b010, "Test 54");
#0
Clk = 3'b111;
#25
// set up different data input values
J = 3'bzz0;
K = 3'bz01;
#50
tbassert(Q == 3'b101, "Test 49");
tbassert(Q_bar == 3'b010, "Test 49");
tbassert(Q == 3'b101, "Test 54");
tbassert(Q_bar == 3'b010, "Test 54");
#0
// load new value in first block separately
J = 3'bz10;
Expand All @@ -739,8 +846,8 @@ begin
#15
Clk = 3'b111;
#15
tbassert(Q == 3'b100, "Test 50");
tbassert(Q_bar == 3'b011, "Test 50");
tbassert(Q == 3'b100, "Test 55");
tbassert(Q_bar == 3'b011, "Test 55");
#0
// load same value appearing at the output with null effect on output
J = 3'b100;
Expand All @@ -749,14 +856,14 @@ begin
// apply clock edge in first block separately
Clk = 3'b110;
#20
tbassert(Q == 3'b100, "Test 51");
tbassert(Q_bar == 3'b011, "Test 51");
tbassert(Q == 3'b100, "Test 56");
tbassert(Q_bar == 3'b011, "Test 56");
#0
// apply clock edge in second and third blocks, end clock pulse in first block
Clk = 3'b001;
#40
tbassert(Q == 3'b100, "Test 52");
tbassert(Q_bar == 3'b011, "Test 52");
tbassert(Q == 3'b100, "Test 57");
tbassert(Q_bar == 3'b011, "Test 57");
#0
Clk = 3'b111;
#15
Expand All @@ -768,8 +875,8 @@ begin
#15
Clk = 3'b111;
#15
tbassert(Q == 3'b100, "Test 53");
tbassert(Q_bar == 3'b011, "Test 53");
tbassert(Q == 3'b100, "Test 58");
tbassert(Q_bar == 3'b011, "Test 58");
#0
// toggle value in first block separately
// J = 3'b011;
Expand All @@ -779,8 +886,8 @@ begin
#15
Clk = 3'b111;
#15
tbassert(Q == 3'b101, "Test 54");
tbassert(Q_bar == 3'b010, "Test 54");
tbassert(Q == 3'b101, "Test 59");
tbassert(Q_bar == 3'b010, "Test 59");
#50
$finish;
end
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