BMS Watchdog Fix (#1283)

### Changelist 
<!-- Give a list of the changes covered in this PR. This will help both
you and the reviewer keep this PR within scope. -->
Watchdog for 1kHz task timing out due to status being checked before
ever getting checked in. Added check-in during initialization to fix.

Fix applied to all watchdogs.

### Testing Done
<!-- Outline the testing that was done to demonstrate the changes are
solid. This could be unit tests, integration tests, testing on the car,
etc. Include relevant code snippets, screenshots, etc as needed. -->

BMS now able to initialize without faulting

### Resolved Tickets
<!-- Link any tickets that this PR resolves. -->

firmware/quadruna/BMS/src/cubemx/BMS.ioc

@@ -73,6 +73,8 @@ FREERTOS.Tasks01=Task100Hz,40,512,RunTask100Hz,Default,NULL,Static,Task100HzBuff
 FREERTOS.configUSE_NEWLIB_REENTRANT=1
 File.Version=6
 GPIO.groupedBy=Group By Peripherals
+IWDG1.IPParameters=Reload
+IWDG1.Reload=LSI_FREQUENCY /  IWDG_PRESCALER / IWDG_RESET_FREQUENCY
 KeepUserPlacement=false
 Mcu.CPN=STM32H733VGT6
 Mcu.Family=STM32H7
@@ -402,7 +404,7 @@ ProjectManager.ToolChainLocation=
 ProjectManager.UAScriptAfterPath=
 ProjectManager.UAScriptBeforePath=
 ProjectManager.UnderRoot=true
-ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN1_Init-FDCAN1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_TIM15_Init-TIM15-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true,10-MX_TIM3_Init-TIM3-false-HAL-true,11-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,12-MX_CRC_Init-CRC-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
+ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_FDCAN1_Init-FDCAN1-false-HAL-true,5-MX_SPI2_Init-SPI2-false-HAL-true,6-MX_TIM15_Init-TIM15-false-HAL-true,7-MX_ADC1_Init-ADC1-false-HAL-true,8-MX_TIM1_Init-TIM1-false-HAL-true,9-MX_USART1_UART_Init-USART1-false-HAL-true,10-MX_TIM3_Init-TIM3-false-HAL-true,11-MX_SDMMC1_SD_Init-SDMMC1-false-HAL-true,12-MX_CRC_Init-CRC-false-HAL-true,13-MX_IWDG1_Init-IWDG1-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
 RCC.ADCFreq_Value=96000000
 RCC.AHB12Freq_Value=256000000
 RCC.AHB4Freq_Value=256000000

firmware/quadruna/BMS/src/cubemx/BMS.ioc.md5

@@ -1 +1 @@
-e19d30cabbe9e6c882e0f72a8cdbdcd7
+db4a003b394ef2b4ad45ec1aef7337e8

firmware/quadruna/BMS/src/cubemx/Src/main.c

@@ -526,7 +526,7 @@ static void MX_IWDG1_Init(void)
     hiwdg1.Instance       = IWDG1;
     hiwdg1.Init.Prescaler = IWDG_PRESCALER_4;
     hiwdg1.Init.Window    = 4095;
-    hiwdg1.Init.Reload    = 4095;
+    hiwdg1.Init.Reload    = LSI_FREQUENCY / IWDG_PRESCALER / IWDG_RESET_FREQUENCY;
     if (HAL_IWDG_Init(&hiwdg1) != HAL_OK)
     {
         Error_Handler();

firmware/quadruna/BMS/src/tasks.c

@@ -423,15 +423,13 @@ _Noreturn void tasks_run1kHz(void)
 {
     io_chimera_sleepTaskIfEnabled();
 
-    static const TickType_t period_ms = 1;
+    static const TickType_t period_ms = 1U;
     WatchdogHandle         *watchdog  = hw_watchdog_allocateWatchdog();
     hw_watchdog_initWatchdog(watchdog, RTOS_TASK_1KHZ, period_ms);
 
     static uint32_t start_ticks = 0;
     start_ticks                 = osKernelGetTickCount();
 
-    hw_watchdog_checkIn(watchdog);
-
     for (;;)
     {
         // Check in for timeouts for all RTOS tasks

firmware/shared/src/hw/hw_watchdog.c

@@ -40,7 +40,7 @@ void hw_watchdog_initWatchdog(WatchdogHandle *watchdog, uint8_t task_id, Tick_t
 {
     watchdog->period          = period_in_ticks;
     watchdog->deadline        = period_in_ticks;
-    watchdog->check_in_status = false;
+    watchdog->check_in_status = true;
     watchdog->initialized     = true;
     watchdog->task_id         = task_id;
 }