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[PowerPC] Incorrect and/anyext interchange in custom combine #68783
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nikic opened this issue
Oct 11, 2023
· 6 comments
· Fixed by #68784 or llvm/llvm-project-release-prs#731
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[PowerPC] Incorrect and/anyext interchange in custom combine #68783
nikic opened this issue
Oct 11, 2023
· 6 comments
· Fixed by #68784 or llvm/llvm-project-release-prs#731
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@llvm/issue-subscribers-backend-powerpc Author: Nikita Popov (nikic)
```llvm
; RUN: llc -mtriple=powerpc64le-unknown-unknown -ppc-asm-full-reg-names < %s
define void @test(i32 %x, ptr %p) {
%lshr = lshr i32 %x, 1
%zext = zext i32 %lshr to i48
%and = and i48 %zext, 255
store i48 %and, ptr %p
ret void
}
```
Results in:
```
rlwinm r3, r3, 31, 24, 31
stw r3, 0(r4)
blr
```
Note the missing store of the upper 16 bits.
This is caused by an incorrect custom DAGCombine added in b0e249d. |
nikic
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nikic
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This custom combine currently converts an `and(anyext(x),c)` into `anyext(and(x,c))`. This is not correct, because the original expression guaranteed that the high bits are zero, while the new one sets them to undef. Emit `zext(and(x,c))` instead. Fixes llvm#68783.
/branch llvm/llvm-project-release-prs/issue68783 |
llvmbot
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Oct 12, 2023
This custom combine currently converts `and(anyext(x),c)` into `anyext(and(x,c))`. This is not correct, because the original expression guaranteed that the high bits are zero, while the new one sets them to undef. Emit `zext(and(x,c))` instead. Fixes llvm/llvm-project#68783. (cherry picked from commit 127ed9ae266ead58aa525f74f4c86841f6674793)
/pull-request llvm/llvm-project-release-prs#730 |
nikic
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(cherry picked from commit 0ead1fa)
nikic
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This custom combine currently converts `and(anyext(x),c)` into `anyext(and(x,c))`. This is not correct, because the original expression guaranteed that the high bits are zero, while the new one sets them to undef. Emit `zext(and(x,c))` instead. Fixes llvm#68783. (cherry picked from commit 127ed9a)
/branch nikic/llvm-project/powerpc-backport |
/pull-request llvm/llvm-project-release-prs#731 |
tru
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Oct 17, 2023
This custom combine currently converts `and(anyext(x),c)` into `anyext(and(x,c))`. This is not correct, because the original expression guaranteed that the high bits are zero, while the new one sets them to undef. Emit `zext(and(x,c))` instead. Fixes llvm/llvm-project#68783. (cherry picked from commit 127ed9ae266ead58aa525f74f4c86841f6674793)
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Results in:
Note the missing store of the upper 16 bits.
This is caused by an incorrect custom DAGCombine added in b0e249d.
The text was updated successfully, but these errors were encountered: