[RFC] stm32h7: Enable support for optional/alternate clocks

[erwango]

TL;DR

STM32 clock_control driver update (limited to H7 for now) to provide a way to configure alternate clocks on peripherals that support it:

    clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,  <- Existing, bus driven, "register" clock
             <&rcc STM32_SRC_PLL3_P SPI123_SEL(2)>;   <- Newly added alternate clock (PLL3_P output here)

This alternate clock source could be selected in peripheral driver thanks to new clock_control_configure() API:

	if (IS_ENABLED(STM32_SPI_OPT_CLOCK_SUPPORT) && (cfg->pclk_len > 1)) {
		if (clock_control_configure(DEVICE_DT_GET(STM32_CLOCK_CONTROL_NODE),
					    (clock_control_subsys_t) &cfg->pclken[1],
					    NULL) != 0) {
			LOG_ERR("Could not select alternate SPI source clock");
			return -EIO;
		}
	}

Goal

Aim of this work is to enable the use of an optional clock in a device configuration.
This is particularly required in case of STM32H7 based platform on which device clock configuration is usually based on 2 different clocks (cf #41650)

• A register clock, required for device configuration, usually coming from APB/AHB bus.
• A kernel clock, which will be used to clock the hardware block (and hence is the one driving the device frequency), typically derived from an alternate clck source (PLL output, fixed clock, ..)

Fixes #41650

Why it worked so far on H7

Device clock configuration used to be functional up to now since clock configuration was set so that APB clk and alternate device clk (the default reset one) were equivalent.

Secondary goal

Besides the initial goal, idea was to provide the basis to support equivalent functionalities on onther STM32 series, such as the possibility to provide an alternate clock to a peripheral. For instance, configuring LSE as the LPUART or LPTIM clock, or HSI48 as the USB clock.

Update of clock_control API (03/14):

Reworked to make use of new clock_control_configure() API, cf #43790

Implementation options:

Alternate clocks bindings

Additional/Alternate clocks could be fixed clocks (HSI, HSE, ..), PLL outputs (PLLX_P/Q/R), sysclock, ....
For all these clocks, I've decided to keep existing RCC device driver as the clock controller. As a consequence, the dt binding used to select a specific clock looks to:

	clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,  <- Existing, bus driven, "register" clock
		 <&rcc STM32_SRC_PLL3_P SPI123_SEL(2)>;   <- Newly added alternate clock (PLL3_P output here)

Another way to support this would have been to set up each potential clock source as a clock controler on its own and use the following binding:

	clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,  <- Existing, bus driven, "register" clock
		 <&pll3 pll_p_output SPI123_SEL(2)>;      <- Discarded binding option

I've discarded this second option because, to be consistent with the binding, this second option would require to instantiate each potential source clock as a device driver, each one implementing clock_control API. This would have had negative impact on code footprint, which could have been considered ok for STM32H7 series but problematic on "smaller" STM32 series.

Clock mux bindings

Complete solution requires to find a way to configure clock mux (as per_ck).

First option is to add a dedicated node descibing the clock mux. Its only property is to configure its clock input

&perck {
	clocks = <&rcc STM32_SRC_HSI_KER CKPER_SEL(0)>;
	status = "okay";
};

Works fine, main drawback is the cost (~220 bytes of flash)

A much simpler alternative was to add clock configuration directly to the clock consumer end node:

	clocks = <&rcc STM32_CLOCK_BUS_APB2 0x00001000>,
		 <&rcc STM32_SRC_HSI_KER CKPER_SEL(0)>,
		 <&rcc STM32_SRC_CKPER SPI123_SEL(4)>;

Though, this proposal has 2 main drawbacks:

• If board dts is poorly configured, 2 consumers of the same internal clock (per_ck here) could set conflicting configurations
• This adds complexity on the consumers driver implementation side that should be able to differentiate between all these clocks

In the end the addition of a clock mux node device felt saner.

Dependencies

This work is based on:

• driver/clock_control: Clean up stm32h7 and stm32u5 drivers #41585, which contain the preliminary clock_control driver work merged
• New set of /include/devicetree/clock.h macros (cf include/devicetree: clocks: Add DT_CLOCKS_HAS_FOO & DT_NUM_CLOCKS #42326) merged
• Dedicated tests provided in tests/drivers/clock_control/stm32_clock_configuration/stm32h7_devices/

Limitations and next steps:

• Only STM32 SPI driver is made aware of this. All STM32 drivers should be updated to take this new clock config into account.
• Extend to other STM32 series. This kernel clock is generally not available on other STM32 series, but most of this work can be reused to support the configuration of alternate peripheral clocks (like HSI on LPUART). This extension would first require a clock_control driver clean up similar to driver/clock_control: Clean up stm32h7 and stm32u5 drivers #41585.
• It is not possible today to clock_off supplementary clocks as they potentially clocks multiple peripherals (or even the core itself). So, this most likely requires the use of power-domains

[erwango]

@heinwessels, @r2r0, FYI

[erwango]

Added clock mux support following discussion on L5 case here

[erwango]

Closing, now that #45053 is merged